A linear battery charger uses a mains power supply and a DC/DC converter for charging a battery with a constant current in an initial phase using a pass device. Linear chargers present a number of advantages compared to other types of chargers. In particular, linear chargers have a compact and relatively simple design which permits manufacturing at a relatively low cost. However, one noticeable drawback of linear chargers lies in their excessive power dissipation due to the fact that the pass device might not be completely open, especially for low charging current.
When charging a battery with constant current, any device between the DC-DC converter and the battery is responsible for losses. In principle these losses are not very severe; however, heating might be an issue and might limit a maximum current that the charger can deliver. In avoiding the use of external components, there are two different approaches to charge a battery at constant current.
A first approach involves controlling the battery charger current directly at DC/DC level. The charge current is controlled using a switch, typically a pMOS pass transistor located between the battery and the DC/DC converter. A disadvantage of this approach is that a precision of the charge current is reduced at low charge current values. To address this issue one common method is to sense the charge current by mirroring the output current with a scaled device. For example, the scale device may be a sense transistor having a smaller physical size than the pass transistor. However, for low charge currents, a small drain-source voltage VDS mismatch between the pass transistor and the sense transistor might result in a large error in setting the charge current.
A second approach involves using a Low Dropout (LDO) regulator to control the output current. In this case, the precision of the charge current is maintained across an entire range of current values; however power dissipation becomes an issue. The instant the output current decreases, a difference between the gate-source voltage and threshold voltage (VGS−VTH) of the pass transistor is reduced by a constant current loop, resulting in a significant increase in dissipated power.